Fully-depleted Strained-Si on Insulator NMOSFETs without Relaxed SiGe Buffers

Haizhou Yin, K. D. Hobart, Rebecca L. Peterson, F. J. Kub, S. R. Shieh, Thomas S. Duffy, James Christopher Sturm

Research output: Contribution to journalConference article

13 Citations (Scopus)

Abstract

Fully-depleted strained Si n-channel MOSFETs were demonstrated on a compliant borophosphorosilicate insulator (BPSG) without an underlying SiGe buffer layer. Stress balance of a SiGe/Si structure, transferred onto BPSG by wafer bonding and Smart-cut® processes, is utilized for the first time to make strained-Si on insulator (sSOI) by a process that does not involve the introduction of misfit dislocations. Strained-Si n-channel MOSFETs with a strain level of 0.6%, equivalent to that of a conventional strained Si layer grown on a relaxed Si 0.85Ge 0.15 buffer, exhibit 60% mobility enhancement over the control, in good agreement with theory. This approach to fabricating strained Si overcomes any potential process or device complexity due to the presence of a SiGe layer in the final devices.

Original languageEnglish (US)
Pages (from-to)53-56
Number of pages4
JournalTechnical Digest - International Electron Devices Meeting
StatePublished - Dec 1 2003
EventIEEE International Electron Devices Meeting - Washington, DC, United States
Duration: Dec 8 2003Dec 10 2003

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Wafer bonding
Buffer layers
Dislocations (crystals)
Buffers
buffers
insulators
field effect transistors
wafers
augmentation

All Science Journal Classification (ASJC) codes

  • Electronic, Optical and Magnetic Materials
  • Condensed Matter Physics
  • Materials Chemistry
  • Electrical and Electronic Engineering

Cite this

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title = "Fully-depleted Strained-Si on Insulator NMOSFETs without Relaxed SiGe Buffers",
abstract = "Fully-depleted strained Si n-channel MOSFETs were demonstrated on a compliant borophosphorosilicate insulator (BPSG) without an underlying SiGe buffer layer. Stress balance of a SiGe/Si structure, transferred onto BPSG by wafer bonding and Smart-cut{\circledR} processes, is utilized for the first time to make strained-Si on insulator (sSOI) by a process that does not involve the introduction of misfit dislocations. Strained-Si n-channel MOSFETs with a strain level of 0.6{\%}, equivalent to that of a conventional strained Si layer grown on a relaxed Si 0.85Ge 0.15 buffer, exhibit 60{\%} mobility enhancement over the control, in good agreement with theory. This approach to fabricating strained Si overcomes any potential process or device complexity due to the presence of a SiGe layer in the final devices.",
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Fully-depleted Strained-Si on Insulator NMOSFETs without Relaxed SiGe Buffers. / Yin, Haizhou; Hobart, K. D.; Peterson, Rebecca L.; Kub, F. J.; Shieh, S. R.; Duffy, Thomas S.; Sturm, James Christopher.

In: Technical Digest - International Electron Devices Meeting, 01.12.2003, p. 53-56.

Research output: Contribution to journalConference article

TY - JOUR

T1 - Fully-depleted Strained-Si on Insulator NMOSFETs without Relaxed SiGe Buffers

AU - Yin, Haizhou

AU - Hobart, K. D.

AU - Peterson, Rebecca L.

AU - Kub, F. J.

AU - Shieh, S. R.

AU - Duffy, Thomas S.

AU - Sturm, James Christopher

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AB - Fully-depleted strained Si n-channel MOSFETs were demonstrated on a compliant borophosphorosilicate insulator (BPSG) without an underlying SiGe buffer layer. Stress balance of a SiGe/Si structure, transferred onto BPSG by wafer bonding and Smart-cut® processes, is utilized for the first time to make strained-Si on insulator (sSOI) by a process that does not involve the introduction of misfit dislocations. Strained-Si n-channel MOSFETs with a strain level of 0.6%, equivalent to that of a conventional strained Si layer grown on a relaxed Si 0.85Ge 0.15 buffer, exhibit 60% mobility enhancement over the control, in good agreement with theory. This approach to fabricating strained Si overcomes any potential process or device complexity due to the presence of a SiGe layer in the final devices.

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JO - Technical Digest - International Electron Devices Meeting

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