HARDWARE IMPLEMENTATION OF A MULTI-RATE REAL-TIME SPEECH CODEC

Bruce Bukiet, Roderick J. Ragland, John Damoulakis

Research output: Contribution to conferencePaperpeer-review

Abstract

This paper describes a multi-rate voice coder/decoder which is totally self contained and portable, requiring only an outlet to a standard North American 110 VAC power line. Virtually everything needed to perform speech coding experiments is contained within the instrument case. This system employs the INTEL 8751 micro-controller and two digital signal processors: the Texas Instrument TMS320 for data acquisition and the AT&T DSP32 for speech coding. The speech coding repertoire includes the following algorithms: o 400 bps vector quantized LPC o 800 bps vector quantized LPC o 2800 bps scalar quantized LPC o 10500 bps residual excited LPC o 32000 bps ADPCM Both the hardware and software configurations are described, along with measured execution times and program and data memory usages. A review of the coding algorithms is presented, with a brief summary of the system's operational parameters.

Original languageAmerican English
Pages2033-2036
Number of pages4
StatePublished - 1987
Externally publishedYes
Event1987 European Conference on Speech Technology, ECST 1987 - Edinburgh, United Kingdom
Duration: Sep 1 1987Sep 4 1987

Conference

Conference1987 European Conference on Speech Technology, ECST 1987
Country/TerritoryUnited Kingdom
CityEdinburgh
Period9/1/879/4/87

ASJC Scopus subject areas

  • Language and Linguistics
  • Computer Vision and Pattern Recognition
  • Human-Computer Interaction
  • Software
  • Linguistics and Language

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