Ultra thin yield enhancement

George Celler, Christophe Maleville

Research output: Contribution to journalReview articlepeer-review

Abstract

The introduction of the silicon-on-insulator (SOI) technology into integrated circuit (IC) manufacturing, especially for chips used for high-speed and/or low-power applications, is described. SOI makes a major impact on depleted devices in terms of performance enhancement and power consumption for low voltage device architectures. SOI wafers are used in advanced device manufacturing, typically involving design rules of 130nm or below, requiring tight specifications for lithography and process behavior. The surface nanotopography (SNT) is also driven by SOI wafer manufacturing due to its impact on bonding properties. As SOI enters the mainstream for leading-edge IC manufacturing, it provides high-volume and production-worthy metrology.

Original languageEnglish (US)
Pages (from-to)27-31
Number of pages5
JournalEuropean Semiconductor
Volume27
Issue number1
StatePublished - Feb 2005
Externally publishedYes

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

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