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VeriLucid: A Verification-aware Data-plane Programming Language

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

Correctness is important in data-plane programs, which run on critical infrastructure connecting millions of users. Verification helps programmers build correct software, but current data-plane tools can only check simple properties or require immense programmer effort. As a solution, this paper introduces the first verification-aware data-plane language: VeriLucid. The core idea is to unify programming and specification in one high-level language, with built-in proof automation. Integration makes it natural for programmers to use verification continuously throughout development, like unit testing but with strong guarantees. In evaluation, we show that VeriLucid requires 10X less programmer effort, in terms of lines of code, than other verification tools with comparable expressiveness.

Original languageEnglish (US)
Title of host publicationSIGCOMM 2026 - Proceedings of the 2026 ACM SIGCOMM 2026 Conference
PublisherAssociation for Computing Machinery, Inc
Pages122-139
Number of pages18
ISBN (Electronic)9798400724671
DOIs
StatePublished - Aug 11 2026
EventACM SIGCOMM 2026 Conference, SIGCOMM 2026 - Denver, United States
Duration: Aug 17 2026 → Aug 21 2026

Publication series

NameSIGCOMM 2026 - Proceedings of the 2026 ACM SIGCOMM 2026 Conference

Conference

ConferenceACM SIGCOMM 2026 Conference, SIGCOMM 2026
Country/TerritoryUnited States
CityDenver
Period8/17/26 → 8/21/26

ASJC Scopus subject areas

  • Computer Networks and Communications
  • Hardware and Architecture
  • Software

Keywords

  • data-plane programming
  • verification

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